A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous Bidirectional Transceiver for Die-to-Die Interface in 5nm CMOS

Yoshinori Nishi,John W. Poulton,Xi Chen,Sanquan Song,Brian Zimmer,Walker J. Turner,Stephen G. Tell,Nikola Nedovic,John M. Wilson,William J. Dally,C. Thomas Gray

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)（2022）

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摘要

This paper presents a clock-forwarded, Inverter-based Short-Reach Simultaneous Bi-Directional (ISR-SBD) PHY targeted for die-to-die communication over silicon interposer or similar high-density interconnect. Fabricated in a 5nm standard CMOS process, ISR-SBD PHY demonstrates 50.4Gb/s/wire (25.2Gb/s each direction) and 0.297pJ/bit on a 0.75V supply over a 1.2mm on-chip channel.

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关键词

simultaneous bidirectional,SBD,ISR,CoWoS,InFO,die-to-die,chip-to-chip and interposer

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