A 100-Gb/s PAM-4 Voltage-Mode Transmitter With High-Resolution Unsegmented Three-Tap FFE in 40-nm CMOS

This letter presents a 100-Gb/s four-level pulse amplitude modulation (PAM-4) voltage-mode transmitter (TX) with a three-tap feed-forward equalizer (FFE). A new configuration, including FFE and output impedance ( $Z_{\mathrm{ out}}$ ) control loops, for implementing voltage-mode FFE is proposed to avoid the driver being segmented. The method can significantly decrease the layout complexity of a high-resolution voltage-mode FFE, improving the output bandwidth. The TX front end merges the 2:1 multiplexer into the driver and adopts a quarter-rate clocking scheme to save significant power. Designed and fabricated in 40-nm CMOS, the PAM-4 TX achieves a maximum data rate of 100 Gb/s with 2.39-pJ/b energy efficiency under a chip-on-board assembly with 5-dB Nyquist loss.