A high reliability under-voltage lock out circuit for power driver IC

This work introduces an under voltage lock out (UVLO) circuit structure, which can be used both in low and high voltage integrated circuits and systems. The UVLO operation is achieved by the comparison of the detection current with the reference current. Compared with conventional design structures, this design can be used not only in special technology, such as, BCD technology, SOI BCD technology, but also in standard CMOS technology. The proposed circuit is designed and verified under a 0.25 μm BCD technology, which occupies a footprint about 0.168 mm2. Captured data shows that the circuit can work stably at 3.3 V supply voltage with about a 5 μA quiescent current and a 440 mV hysteretic range.