Single-event burnout of LDMOS with polygon P+ structure

The performance and triggering mechanism of the single-event burnout (SEB) of the lateral double diffused MOSFET with polygon P+ insert structure (PP-LDMOS) are evaluated by 2-D numerical simulations. The novel PP-LDMOS and the conventional LDMOS are analyzed and compared to examine the effect of the polygon P+ insert structure on the SEB performance of the LDMOS device. The most sensitive volume of the conventional LDMOS and PP-LDMOS are investigated. In addition, the hardening mechanism of PP-LDMOS is explained. The simulation results show that the polygon P+ structure can discharge the holes generated by the ion's strike effectively. Compared with the conventional LDMOS structure, the polygon P+ insert structure can improve the SEB threshold voltage from 19 % to 88 % of breakdown voltage.