Device feasibility and performance improvement methodologies for thin film transistors using In-Ga-Sn-O channels prepared by atomic-layer deposition

Thin film transistors (TFTs) using In-Ga-Sn-O (IGTO) active channel layers, which were prepared by atomic-layer deposition (ALD) techniques, were fabricated and characterized with exploring the optimum IGTO channel compositions and the process conditions for the formation of gate-stack structures. The introduction of an O-3 oxidant was confirmed to secure a wider process window, which was explained by hydrogen incorporation from the protection layer/gate insulator stacked layers into the IGTO active channel. The cationic compositions of the IGTO thin films were controlled by subcyclic ratio design of each precursor. When the number of In-Ga precursor subcycles increased from 4 to 6, the Ga/Sn ratio increased from 3.5 to 4.0, leading to marked improvements in the V-ON characteristics of the fabricated IGTO TFTs. It was found from a comparative analysis on the device characteristics that the Ga/Sn ratio in the IGTO channel had a more dominant effect on the V-ON characteristics rather than the In/Ga ratio. The device using the channel with a cationic composition of 5.8:4.0:1.0 (In:Ga:Sn) exhibited the field-effect mobility of 19.1 cm(2)/V s, the subthreshold swing of 0.22 V/dec, and the threshold voltage (V-TH) of 0.22 V, which corresponded to the best device characteristics among the fabricated devices. Furthermore, the V-TH shifts were examined to be +0.4 and -0.4 V in positive and negative bias stress conditions, respectively, demonstrating excellent gate-bias stress stabilities. The obtained results suggest the device feasibility and fabrication process validity for the TFT applications using IGTO active channel layers prepared by ALD techniques. Published under an exclusive license by the AVS.