Resource- and Power-Efficient High-Performance Object Detection Inference Acceleration Using FPGA

ELECTRONICS(2022)

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摘要
The success of deep convolutional neural networks in solving age-old computer vision challenges, particularly object detection, came with high requirements in terms of computation capability, energy consumption, and a lack of real-time processing capability. However, FPGA-based inference accelerations have recently been receiving more attention from academia and industry due to their high energy efficiency and flexible programmability. This paper presents resource-efficient yet high-performance object detection inference acceleration with detailed implementation and design choices. We tested our object detection acceleration by implementing YOLOv2 on two FPGA boards and achieved up to 184 GOPS with limited resource utilization.
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关键词
hardware acceleration, object detection, FPGA, deep learning, YOLOv2, CNN
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