Minimizing Subtle Errors in Computing Information of TCAM by Partial "N" Search Key Implementation

The primary memory of the computer gets corrupted due to microparticles that possess a great deal of energy. This causes transient kind of errors and it is called subtle errors. High corruption of data in computer systems has been occurred because of these errors. Major sources of subtle errors include ionic particles, huge radiations say example alpha, beta and gamma rays, protons, neutrons etc., When TCAM configuration changes from 120 nm to 20 nm technology, there was a drastic increase in subtle errors more than multiples of eight. Devices operated in low power regions are more prone to subtle errors. Memory storage devices like secondary memory element called cache, registers are more feasible to subtle errors.(1) Behavior of subtle errors never damage circuit configuration but changes the information content leading to erroneous data. The proposed architecture is called N-SEARCH KEY TCAM, where in this system, it has been predicted that occurrence of subtle errors are very small. This innovative method of detecting and correcting both single and burst type of subtle errors has many modules like TCAM, Multiplexer, control circuit and Error correction code frame. Moreover, the proposed architecture N-SEARCH KEY ternary memory uses a special LUT for matching process. A key named Search key was generated which contains don't care bits for matching subtle errors. Unlike regular TCAM, this design uses sequential LUT which enhances matching time of order O(wnlog2n). Initially, proposed scheme have been used to find single bit subtle errors by changing forbearance factor (F) and chances of occurrence of error among TCAM information. The design was enhanced to detect multiple subtle errors and rectified the same. If match not occurs with predetermined information, then IP filter forbids the unauthorized users from using global network resources, thus providing better information security. By the proposed method, number of improper segregation ratio decreases with increase in Forbearance ratio parameter and time required to detect and correct the same is also considerably reduced. By controlling the forbearance factor F, the best duration schemes can be chosen. Through the given architecture, average time consumption for error checking of subtle errors would range from 0.6 to 0.7 mu s.