A high-throughput multimode low-density parity-check decoder for 5G New Radio

INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS(2022)

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摘要
This paper presents a partially parallel low-density parity-check (LDPC) decoder for the 5G New Radio (NR) standard. The design is using a multiblock parallel architecture with a flooding schedule. The decoder can support any code rates and code lengths up to the lifting size Z(max) = 96. To compensate for the dropped throughput associated with the smaller Z values, the design can double and quadruple its parallelism when lifting sizes Z <= 48 and Z <= 24 are selected, respectively. Therefore, the decoder can process up to eight frames and restore the throughput to the maximum. To facilitate the design's architecture, a new variable node for decoding the extended parity bits existing in the lower code rates is proposed. The FPGA implementation of the decoder results in a throughput of 2.1 Gbps decoding the 11/12 code rate. Additionally, the synthesized decoder using the 28-nm TSMC technology achieves a maximum clock frequency of 526 MHz and a throughput of 13.46 Gbps. The core decoder occupies 1.03 mm(2), and the power consumption is 229 mW.
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关键词
5G, LDPC decoder, lifting size, multiblock parallel, shift network, throughput
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