Overcoming noise-driven degradation in fidelity of silicon-based entangling gates with bias controls

The quality of silicon quantum bits (qubits) is highly vulnerable to charge noise that is omnipresent in semiconductor devices, becoming a critical bottleneck for physical realization of scalable quantum circuits with universal logic gates. For a realistically sized target system of a silicon-germanium heterostructure whose quantum confinement is manipulated with electrical biases imposed on top electrodes, here we computationally explore the noise-robustness of 2-qubit entangling operations with a focus on the controlled-X (CNOT) logic that is essential for designs of gate-based universal quantum circuits. With device simulations based on the physics of bulk semiconductors augmented with electronic structure calculations, we not only quantify the degradation in fidelity of single-step CNOT operations with respect to the magnitude of charge noise, but discuss a strategy of device engineering that can significantly enhance noise-robustness of CNOT operations with almost no sacrifice of speed compared to the single-step case. Details of device designs and controls that this work presents can establish a rare but practical guideline for potential efforts to develop silicon-based quantum processors using an electrode-driven quantum dot platform.