Parameterized Design and Formal Verification of Multi-ported Memory
2022 26th International Conference on Engineering of Complex Computer Systems (ICECCS)(2022)
摘要
Multi-ported memories are essential modules to provide parallel access for high-performance parallel computation systems such as VLIW and vector processors, etc. However, the design of multi-ported memories are rather complex and error-prone, which usually causes the high implementation cost. Therefore, the designs and verification of multi-ported memories become challenging. In this paper, we fir...
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关键词
Costs,Hardware,Trajectory,Vector processors,VLIW,Formal verification
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