Thermal-constrained memory management for three-dimensional DRAM-PCM memory with deep neural network applications

For the deep neural network applications, the requirement of the memory bandwidth and volume is huge. Multiple DRAM and PCM (phase-change memory) chips are stacked to form the 3D DRAM-PCM memory, which can support different features from DRAM and PCM chips. But the thermal problem in 3D DRAM-PCM memory is more serious than the traditional memories. To constrain the peak temperature, the memory management for the 3D hybrid DRAM-PCM memory is required. In this work, we proposed the thermal-constrained memory management (TCMM) to solve this problem. TCMM applies different methods to reduce the power and constrain the peak temperature: dynamic thermal management with data preloading (DP), data management (DM), and address remapping (AR). Compared to the related works, the 3D DRAM-PCM memory using TCMM can reduce the peak temperature up to 26.25 °C and the latency up to 78.23% in our experiments. The peak temperature can be also constrained under the predefined thermal limitation.