A 112.5Gb/s ADC-DSP-Based PAM-4 Long-Reach Transceiver with >50dB Channel Loss in 5nm FinFET

Z. Guo,A. Mostafa, A. Elshazly, B. Chen,B. Wang, C. Han,C. Wang,D. Zhou,D. Visani,E. Hsiao, F. Chu, F. Lu,G. Cui, H. Zhang, H. Wang, H. Zhao, J. Lin, J. Gu, L. Luo, L. Jiang,M. Singh,M. Gambhir,M. Hasan,M. Wu,M. J. Yoo, P. Liu,S. Kollu,T. Ye, X. Zhao, X. Yang, X. Han,Y. Huang,Y. Sun,Z. Yu, Z. H. Jiang,Z. Adal,Z. Yan

2022 IEEE International Solid- State Circuits Conference (ISSCC)（2022）

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摘要

With increasing demand in next-generation data centers and high-performance computing and networking, wireline transceivers are required to operate at 112Gb/s to provide high bandwidth [1]–[3], meanwhile it is necessary to handle >40dB insertion loss to support legacy channels and large package designs [4]. Low-power design is also critical for the integration of multiple transceivers [5]. To a...

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