SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased With Technology Scaling

In this article, we present static random access memory (SRAM) write- and performance-assist cells (W- and P-ACs, respectively) that can effectively resolve the degradation in writeability and performance due to the increase in interconnect resistance with technology scaling. The proposed W- and P-ACs have bit-cell compatible layouts, and thus, they can be inserted into a bit-cell array without wh...