Automated Mapping of Very Large Areas of VLSI Circuit Using SIL

International Symposium for Testing and Failure AnalysisISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis(2014)

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摘要
Abstract In this paper, we present a novel system and method for the automated mapping of pattern and spontaneous photon emission from very large areas of VLSI circuit using Solid Immersion Lens (SIL). To the best of our knowledge, this is the first time that such a technique has been developed and demonstrated on a real chip. The system being presented includes an automation software Application Programming Interface (API) to control the microscope used to acquire the images, an acquisition software that allows to automatically navigate the chip, move (hop) the SIL to the desired location, focus the image after the SIL landing, register the acquired images, and stitch them together to create a high resolution mosaic. In this paper, we will present, for the first time, a real life example involving thousands of images acquired from a 90 nm bulk technology test chip that were used to create a mosaic of more than 25 x 25 images covering a total area of approximately 400 x 400 μm2.
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