A 37-43GHz Two Way Current Combining Power Amplifier with 19.6-dBm P-1dB for 5G Phased Arrays in 45nm-SOI CMOS

This paper describes the design and the measurement results of a two-way transformer based current combining power amplifier in 45-nm SOI CMOS technology for 5G phased-array systems. A simplified model for the current combiner and the advantages of using current combining is also discussed. A differential splitter for the input power split is also designed to maintain a differential input operation. The PA stage is a 3-stack amplifier to sustain a higher voltage swing at the output under no breakdown issues and ensure a reliable operation. The two-stage design achieves a 19.6 dBm output 1-dB compression with an efficiency of 23% at P1dB and 25% at Psat with 15 dB of gain. The band of operation is 37-43GHz. the design consumes 128mA from a 1.8V supply. The total area is 0.3x0.4 mm2 without pads.