Controlling Threshold Voltage of CMOS SOI Nanowire FETs With Sub-1 nm Dipole Layers Formed by Atomic Layer Deposition

IEEE Transactions on Electron Devices(2022)

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摘要
In this article, bidirectional control of threshold voltage ( ${V}_{T}$ ) is realized in both n- and p-silicon-on-insulator (SOI) nanowire FETs (NWFETs) by using sub-1 nm atomic-layer-deposited (ALD) dipole layers (Y2O3 and Al2O3) for the first time. A 0.7 nm Y2O3更多
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关键词
Hafnium oxide,High-k dielectric materials,Logic gates,Threshold voltage,Silicon,Dielectrics,MOS capacitors
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