A High-Throughput VLSI Architecture Design of Canonical Huffman Encoder

IEEE Transactions on Circuits and Systems II: Express Briefs(2022)

引用 7|浏览5
暂无评分
摘要
In this brief, a high-throughput Huffman encoder VLSI architecture based on the Canonical Huffman method is proposed to improve the encoding throughput and decrease the encoding time required by the Huffman code word table construction process. We proposed parallel computing architectures for frequency-statistical sorting and code-size computational sorting. This architecture results in a process ...
更多
查看译文
关键词
Computer architecture,Sorting,Image coding,Microprocessors,Encoding,Very large scale integration,Clocks
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要