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A Novel Multi-Chip Stacking Technology Development Using a Flip-Chip Embedded Interposer Carrier Integrated in Fan-out Wafer-Level Packaging

2021 IEEE 71st Electronic Components and Technology Conference (ECTC)(2021)

Cited 3|Views2
Key words
EIC,embedded interposer carrier,Fan-out,wafer-level packaging,FO-WLP,Process development,electrical test
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