A memristor-based Bayesian machine

Memristors, and other emerging memory technologies, can be used to create energy-efficient implementations of neural networks. However, for certain edge applications (in which there is access to limited amounts of data and where explainable decisions are required), neural networks may not provide an acceptable form of intelligence. Bayesian reasoning could resolve these concerns, but it is computationally expensive and—unlike neural networks—does not naturally translate to memristor-based architectures. Here we report a memristor-based Bayesian machine. The architecture of the machine is obtained by writing Bayes’ law in a way that makes its implementation natural by the principles of distributed memory and stochastic computing, allowing the circuit to function solely using local memory and minimal data movement. We fabricate a prototype circuit that incorporates 2,048 memristors and 30,080 transistors using a hybrid complementary metal–oxide–semiconductor/memristor process. We show that a scaled-up design of the machine is more energy efficient in a practical gesture recognition task than a standard implementation of Bayesian inference on a microcontroller unit. Our Bayesian machine also offers instant on/off operation and is resilient to single-event upsets.