A 50gb/S Repeater And 2 X 50gb/S 2(7)-1 Prbs Generator

For pursuing the high speed information transmission, the design and research of the high speed SerDes circuit are actively developing now. Due to the requirements for long transmission path, intensive equalization and high speed transmission circuit testing function, two high speed SerDes circuits are designed and fabricated based on 130nm SiGe BiCMOS technology. One is for the research of the equalization techniques in ultra-high data rate so an ultra-high speed repeater is designed, and it can work at up to 50Gb/s and compensate for more than 50dB channel loss, with a power consumption of 676.5mW at 3.3V. The other is a low power pseudo-random binary sequence generator chip which can output 2 x 50Gb/s data, and the power consumption is 270mW at 1.8V.