Survey and Comparison of Digital Logic Simulators

2019 Austrochip Workshop on Microelectronics (Austrochip)(2019)

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摘要
This work provides an overview of digital logic simulators which are the classical tools for verification of digital hardware. Existing simulators and their features are presented and both commercial simulators as well as tools from the open-source community are included in our survey. Furthermore, the tools have been evaluated using a set of benchmark designs. All of the evaluation designs are freely available over the internet and have been carefully selected so that everybody can prove the results presented herein. To the authors best knowledge this is the first public available overview on existing digital logic simulators since 20 years.
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关键词
Digital Logic Simulation,Verification,Electronic Design Automation,VLSI Design,ASIC,FPGA,Survey
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