An Amplifier-Free 0-2 SAR-VCO MASH Delta Sigma ADC

A 0-2 Multi Stage Noise Shaping (MASH) analog-to-digital converter (ADC) is proposed. A SAR ADC and a VCO-based quantizer (VCOQ) are used in the first stage and second stages, respectively. The VCOQ proposed in this paper achieves second-order noise shaping by employing an error feedback architecture. The error feedback architecture is implemented by extracting the quantization noise of the VCOQ as a pulse-width-modulated (PWM) signal, and feeding it back to the VCO input using a charge pump. The proposed architecture filters the charge pump errors. Also, SAR comparator thermal noise requirement is relaxed as the comparator noise is canceled at the output, along with the first stage quantization noise. The proposed ADC was simulated using a 65nm CMOS technology, and an SNDR of 89.5 dB was achieved with an oversampling ratio (OSR) of 20.