A 67mW D-band FMCW I/Q Radar Receiver with an N-path Spillover Notch Filter in 28nm CMOS

Anirudh Kankuppe,Sehoon Park,Kristof Vaesen,Dae-Woong Park,Barend van Liempd,Piet Wambacq,Jan Craninckx

ESSCIRC 2021 - IEEE 47TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC)（2021）

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摘要

A 139.5-157.7 GHz D-band I/Q radar receiver with an on-chip antenna and a spillover resilient N-path baseband filter is presented. Spillover and its manifestation based on the chirp rate is discussed and a filter for spillover mitigation is implemented. The radar is characterized with 55 dB conversion gain, 8dB NF (5.6 dB EINF) and 26dB narrow-band spillover attenuation. The receiver is also capable of selectively mitigating very closeby large reflectors and the system power consumption is 67mW.

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关键词

FMCW, D-band, N-path filters, spillover mitigation, radar receiver, low power

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