X-Layer: Building Composable Pipelined Dataflows for Low-Rank Convolutions

2021 30th International Conference on Parallel Architectures and Compilation Techniques (PACT)(2021)

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摘要
Prior research in hardware accelerators has largely focused on spatial convolutions (CONV). However, state-of-the-art DNNs employ low-rank convolutions (LR-CONV). LR-CONVs such as depthwise and pointwise convolutions exhibit lower arithmetic intensity and lower data re-use. LR-CONV s result in low hardware utilization and high latency. However, they provide opportunities for inter-layer data reuse...
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关键词
Buildings,Random access memory,Tools,System-on-chip,Space exploration,Parallel architectures,Hardware acceleration
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