Resource Efficient Sub-VT Level Shifter Circuit Design Using a Hybrid Topology in 28 nm

SMACD / PRIME 2021; International Conference on SMACD and 16th Conference on PRIME(2021)

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摘要
This paper presents a resource efficient level shifter circuit, which is capable of converting input voltages below subthreshold to above threshold voltages, making it suitable for ultra low power applications such as wireless sensor networks, biomedical implants, environmental sensors, to name a few. The proposed circuit topology has two stages. The first stage comprises of a Wilson current mirro...
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