A 6.4 GHz Continuous-Time ΣΔ ADC Using Body-Biased Feedforward Op-Amps in 28nm-FDSOI

2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)(2021)

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摘要
This paper presents a 6.4 GHz 3rd order continuous-time lowpass Sigma-Delta ADC in a 28nm FDSOI process. The ADC achieves 76 dB dynamic range in a 100 MHz bandwidth and consuming only 11.5 mW from a 1 V supply. The loop filter uses a feedforward multistage op-amp which uses body-bias to enhance performance without increasing power consumption. The ADC has a Figure of Merit of 175.4 dB and occupies...
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关键词
Sigma-delta modulation,Power demand,Circuits and systems,Layout,Silicon-on-insulator,Bandwidth,Dynamic range
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