Reverse Engineering Register to Variable Mapping in High-level Synthesis

Mohammed Abderehman,Rupak Gupta,Chandan Karfa

2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)（2021）

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摘要

This paper presents a framework for reverse engineering of the register to variable mapping in high-level synthesis (HLS). The proposed framework helps to get back an equivalent C code from the RTL code generated by the HLS tools. The framework first extracts a high-level behaviour (RTL-C) from the RTL. The scheduled C code (SD-C) is then obtained by decoding the scheduling information. The SD-C c...

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关键词

Reverse engineering,Tools,Benchmark testing,Very large scale integration,Generators,Registers,Decoding

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