MN-Core - A Highly Efficient and Scalable Approach to Deep Learning

K. Namura,Johannes Maximilian Kühn, Tohru Adachi, H. Imachi, H. Kaneko,T. Kato, Go Watanabe, Naoto Tanaka, S. Kashihara, Hiroshi Miyashita, Y. Tomonaga,Ryosuke Okuta,Takuya Akiba,Brian Vogel, S. Kitajo, F. Osawa,K. Takahashi, Y. Takatsukasa, K. Mizumaru, T. Yamauchi, J. Ono,A. Takahashi,Tanvir Ahmed, Y. Doi, K. Hiraki, J. Makino

2021 Symposium on VLSI Circuits(2021)

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摘要
MN-Core is a highly efficient deep learning training accelerator reaching in excess of 1 TFLOPS/W (half-precision) at board level in real-world mixed-precision workloads. To reach and sustain this level of performance, the design is partitioned and packaged as four-die MCM package exceeding 3000mm 2 of die area.
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关键词
Accelerator,MCM,Deep Learning,HPC,SIMD
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