Analog Figures of Merit of Vertically Stacked Silicon Nanosheets nMOSFETs With Two Different Metal Gates for the Sub-7 nm Technology Node Operating at High Temperatures

The analysis of vertically stacked nanosheet (NS) n-type transistors with two different metal gate-stacks (with a total thickness of 7.5 and 4.7 nm) is presented in this work from room temperature to 200 °C. The focus in this work is on the classical analog figures of merit (FoM). In all NS devices, superior performance is observed that is confirmed by the subthreshold swing variation with tempera...