A Hardware Aware Liquid State Machine Generation Framework

The liquid state machine (LSM) is a kind of spiking neural network (SNN) that usually is mapped to an NoC-based neuromorphic processor to perform tasks such as classification. The creation of these LSM models does not consider the structure of Network on Chip (NoC) which resulting in heavy communication pressure on the NoC. In this paper, we propose a hardware aware LSM network generation framework. By keeping the communication between neurons within cores as much as possible, this framework could reduce the communication overheads between cores effectively. The experimental results show that the LSM model produced by our framework could achieve state-of-art accuracy and is hardware-friendly. Compared with the mapping method, the synapses in our LSM is reduced by 94.14%, the total packets in NoC is reduced by 78.3%, the maximum transmission latency is reduced by 97.5%, the average transmission latency is reduced by 54%, the throughput increased 2.8x.