An Ultra-Low Power MOS2 Tunnel Field Effect Transistor PLL Design for IoT Applications

This work presents the implementation of analytical transport model of MoS2tunnel field effect transistor (TFET) using Verilog-A in Cadence/Spectre. The parameters of the model are extracted, and most notable is its high ION/IOFF ratio, which makes it suitable for low power design, and IoT applications. Subsequently, we employ the TFET model in the design of ultralow power phase locked loop (PLL)....