StateReveal: Enabling Checkpointing of FPGA Designs with Buried State

The ability to save and restore the entire state of an FPGA design is essential for hardware checkpointing, which enables live migration, fault recovery, and novel debugging flows. However, hard blocks such as block RAMs and DSP blocks have state elements that cannot be saved or restored using conventional checkpointing techniques such as readback. This results in an incomplete checkpoint, thereby...