A Fully Integrated 2.7 Mu W-70.2dbm-Sensitivity Wake-Up Receiver With Charge-Domain Analog Front-End,-16.5db-Sir, Fec And Cryptographic Checksum

2021 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)(2021)

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摘要
Ultra-low-power (ULP) receivers are gaining traction in consumer and industrial IoT solutions as standards such as WiFi 802.11ba, BLE, and NB-IoT have adopted wakeup messages into their protocols to reduce synchronization energy overhead. ULP wakeup receivers (WRX) enable lower average power, lower latency, and precise time synchronization which leads to more dense network deployments [1–5]. This paper presents a $2.7\\ \\mu$W WRX that supports a simplified 802.15.4g MAC/PHY baseband, RSSI and clear channel assessment (CCA), forward error correction (FEC), and cryptographic checksum. The novelty of this WRX is the parallel-path rectifier and charge-domain analog front-end (AFE), which provides low power, wide dynamic range, pulsed interference rejection, and reliable operation across harsh environments and industrial wireless conditions in real-world deployments.
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