Current-Bunch Concept for Parasitic-Oriented Extraction and Optimization of Multi-Chip SiC Power Module

Parasitic inductance reduction is increasingly vital for the SiC power module in high-frequency and high-capacity applications. To address the parasitic issue, the automatic layout design offers the potential to pursue the optimal configuration of the power packaging. However, the efficient and accurate parasitic extraction of the packaging is the bottleneck of the automatic design scenario. In th...