Balanced Gray Codes for Reduction of Bit-Flips in Phase Change Memories.

Phase Change Memories combine byte addressability, non-volatility, and low energy consumption with densities comparable to storage devices and access speeds comparable to random access memory. This qualifies PCM as a successor technology to both DRAM and SSD. The only disadvantage is limited endurance (though still orders of magnitude higher than for Flash memory). Since PCM consume energy only when actively reading and writing and writing consumes much more energy than reading, reducing “bitflip pressure” is important not only in order to stretch endurance, but also to save energy. We present two related contributions to relieve bitflip pressure. Many data structures use status or dirty bits that over the lifetime of a data structure such as a key value store can flip numerous times. We use balanced Gray codes to distribute the changes of a dirty bit across a whole byte. Our second construction offers a way to implement counters using Gray codes that have close to one bit-flip per increment.