The Factors that Inflence the Effective Mobility in 5 NM PMOS Finfet Design

In the 5 nm FinFET design, more induced stress can bring charge mobility improvement and device performance. There are several influence factors on stress and mobility in the process design. Substrate orientation and channel direction combination is a early considered factor. The source/drain epitaxy (S/D epi) plays an important role in channel stress formation. The two steps in S/D epi, seed and bulk epitaxy processes play a different role in stress formation and mobility improvement. Fin structure is also an important factor in process design. We have found that a fin height of 50 nm for a 5 nm PMOS FinFET device can provide maximum hole mobility.