A Pico-second Resolution Sensor of NTV DFF Timing Variation with Cancelling Errors from PVT and RC Delay along Testing Path

A novel circuit for testing sequential element setup time and hold time variation at near threshold voltage (NTV) is proposed and verified at 28nm HKMG node. A structure of two-path with configurable delay differentiation enables to cancel testing errors introduced by PVT variations and RC delay along the testing path. Pico-seconds of resolution is achieved. Simulation of setup/hold time is implemented with variable voltage, process corner, temperature and data edge. The results indicate that the scenario of data rising edge has a larger setup&hold time than the scenario of data falling edge at NTV.