A Constant Loop Bandwidth Fraction-N Frequency Synthesizer for GNSS Receivers

A fully integrated 2.8 GHz to 3.4 GHz frequency synthesizer for satellite navigation RF resciever is implemented in 0.18-mu m CMOS process and its area is 0.4 mm(2). A constant and low tuning Gain (KVCO) is achieved by an improved voltage-controlled oscillator (VCO) architecture. The constant loop bandwidth, which is designed to 60 kHz, is implemented by making charge pump current (ICP) match the division ratio N. The synthesizer exhibits phase noise of -85.62 dBc/Hz at 10 KHz offset and -92.78 dBc/Hz at 100 kHz offset, while consuming 18 mW from a 1.8 V supply.