Problem C - GPU Accelerated Logic Re-simulation - (Invited Talk)

ICCAD, pp. 1-4, 2020.

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Abstract:

Logic “re” -simulation can be defined as gate level simulation where the input waveforms at every primary input and pseudo-primary input (such as register/RAM outputs) are known. Such waveforms could come from the unit\u0027s RTL simulation trace or Automatic Test Pattern Generation (ATPG) vectors. This type of simulation is useful in doi...More

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