A Customized Graph Neural Network Model for Guiding Analog IC Placement.

ICCAD(2020)

Cited 64|Views30
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Abstract
Analog IC placement is typically a manual process that requires strong experience and trial-and-error iterations as it produces a large impact to circuit performance in a complicated manner. Although automatic analog placement has been studied for decades, existing methods are inadequate for achieving performance comparable with manual designs. In this work, a customized graph neural network model is developed for predicting the impact of placement on circuit performance. Knowledge obtained by such a model can be transferred among different topologies of the same circuit type. Simulation results show that the proposed model is superior to a recent CNN-based work in terms of both accuracy and knowledge transfer. It also outperforms a plug-in use of graph attention network. The proposed model is further applied in analog IC placement and achieves performance similar to manual designs.
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Key words
circuit performance,automatic analog placement,customized graph neural network model,graph attention network,analog IC placement,trial-and-error iterations,circuit topology,knowledge transfer
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