Strategies of Computational Process Synthesis — a System-Level Model of HW/SW (Micro)Architectural Mechanisms

2020 9TH MEDITERRANEAN CONFERENCE ON EMBEDDED COMPUTING (MECO)(2020)

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摘要
The paper deals with insufficient unification of computational process transformation techniques and their mapping on design components in hardware and software domains. To address this issue, formulation of generic transformation approach, “strategy of computational process synthesis” (SCPS), is proposed. Inspired by composability of management mechanisms in software domain, custom hardware microarchitecture mechanisms are proposed to implement as synthesizable and programmable execution kernels that generate hardware in RTL or HLS form. Experimental implementation of ActiveCore framework and demo SoC designs based on this approach showed considerable improvement of hardware projects organization, while preserving competitiveness of the designs.
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关键词
Electronic System Level, microarchitecture, hardware generation, SCPS, MLIP core, HLS
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