Enabling Multiple-Vt Device Scaling for CMOS Technology Beyond 7nm Node

Vincent S. Chang,S. H. Wang, J. H. Lu, W. H. Wu,B. F. Wu,B. C. Hsu, K. C. Kwong,J. Y. Yeh,C. H. Chang,C. H. Chen,C. O. Chui, M. S. Yeh,K. B. Huang,R. Chen,K. S. Chen,S. Y. Wu

2020 IEEE Symposium on VLSI Technology（2020）

Cited 8|Views14

Key words

FinFET,HK engineering,high-k engineering,GAA nanosheet transistor,gate all-around nanosheet transistor,WFM patterning boundary control,multiple-Vt device scaling,advanced CMOS technology,conformal work function metal

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