CASPER: CAD Framework for a Novel Transistor-Level Programmable Fabric

Mustafa M. Shihab,Bharath Ramanidharan,Gaurav Rajavendra Reddy, Jingxian Tian,William Swartz,Carl Sechen,Yiorgos Makris

2020 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)（2020）

Cited 1|Views26

Key words

CASPER,TRAP fabric,ASIC-esque cell library,industry-leading logic synthesis tools,robust programming bitstream generation tool,transistor-level programmable fabric,high-density reconfigurable logic,custom IC,TRAP chip,TimberWolf and the versatile place and route tools,TimberWolf and the VPR tools,size 65.0 nm

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