MIPSGPU: Minimizing Pipeline Stalls for GPUs With Non-Blocking Execution
IEEE Transactions on Computers(2021)
摘要
Improving the latency hiding ability is important for GPU performance. Although existing works, which mainly target on either improving thread level parallelism or optimizing memory hierarchy, are effective at improving GPUs’ latency hiding ability, warps are still blocked after executing long latency operations, reducing the number of schedulable warps. This article revisits the recently proposed...
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关键词
Graphics processing units,Registers,Benchmark testing,Computer architecture,Pipelines,Instruction sets,Symmetric matrices
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