DLUX: a LUT-based Near-Bank Accelerator for Data Center Deep Learning Training Workloads
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(2021)
Abstract
The frequent data movement between the processor and the memory has become a severe performance bottleneck for deep neural network (DNN) training workloads in data centers. To solve this off-chip memory access challenge, the 3-D stacking processing-in-memory (3D-PIM) architecture provides a viable solution. However, existing 3D-PIM designs for DNN training suffer from the limited memory bandwidth ...
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Key words
Training,Table lookup,Random access memory,Bandwidth,Layout,Three-dimensional displays
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