28 Gbps silicon germanium hetero structure avalanche photodetectors

Owing to its low-cost, high-yield, and dense integration ability, silicon nanophotonics is a good candidate to tackle the needs of exponentially growing communications in data centers, high-performance computers, and cloud services. Moreover, a number of nanophotonic functions are now available on a single chip, as they take advantages of silicon-foundry process maturity and epitaxial germanium integration. Optical photodetectors are key building blocks in the library of group-IV components and their performances are quite successful nowadays. In particular, silicon-germanium waveguide-integrated photodetectors are fixing new standards for next generation of on-chip interconnects in terms of compactness, speed, power consumption and cost. Indeed, conventional pin photodetectors yield good responsivities (~1 A/W in a 1.5 μm wavelength range), high bandwidths (~50 GHz), and dark currents well below 1 μA. Despite recent advances, their optical power sensitivities remain rather modest and speeds are limited to 25 Gbps only, however. Compensating for the insufficient photodetector sensitivity requires higher transmitter output powers and therefore higher energy consumption. Additional energy savings can be obtained by eliminating receiver electronics. Alternatively, an appealing approach is to exploit device structures with an internal multiplication gain to lower even more the power budget and improve energy efficiency of chip-based optical links. In this work, we report on waveguide-integrated photodetectors with lateral silicon-germanium-silicon heterojunctions. Here, we present avalanche photodetectors fabricated on 200-mm silicon-on-insulator wafers using complementary metal-oxide-semiconductor-compatible processes. Devices operate in the low-gain-regime to facilitate high-speed link operations at 1.55 μm wavelengths. An error-free signal detection was achieved at 28 Gbps, with power sensitivity of -11 dBm for 10-9 bit-error-rate, which is a relevant link rate for emerging chip-scale optical interconnects.