Design and Implementation of Parallel Pipeline Processor

In order to further improve the speed of instructions' execution on the basis of the current multi-cycle processor and pipeline processor which is commonly used by MIPS processors, we implemented a simple dual-pipeline processor. To show its superiority, we followed the implementation of this three processors, and then carried out the same test and analysis. The final result indicates that the execution speed of the pipeline processor is 2.837 times fast than the multi-cycle processor, while the dual-pipeline processor is running 32.8% faster than the normal pipeline.