Towards A Robust Approach To Threshold Voltage Characterization And High Temperature Gate Bias Qualification

The threshold voltage hysteresis seen in SiC MOSFETs complicates the direct use of qualification standards such as AEC-Q101 for high-temperature gate-bias effects. We review approaches that are appropriate for use in a production environment and can accommodate this effect, comparing their efficacy. Our findings show that in situ hysteresis measurements can be nearly as effective as those made ex situ, and that threshold instability in modern SiC MOSFETs is more performance matter than reliability problem.