OpenPiton : An Emerging Standard for Open-Source EDA Tool Development

With the transistor count of industrial ASICs reaching the tens of billions, EDA tools must have the scalability to handle such large designs. However, few open-source RTL designs reflect the scale that industrial ASICs are reaching. OpenPiton, on the other hand, has a scalable, tiled manycore design that can reach as many as 65,536 cores in a single chip. This can enable EDA tool developers to test their tools’ functionality at that extreme scale. With its many configurability options, extensive scalability, and open-source ASIC synthesis and back-end flow, the OpenPiton platform is well placed to supercharge open-source EDA tool development. OpenPiton is the world’s first open-source, generalpurpose, multithreaded, manycore processor and framework. The high-level OpenPiton architecture is shown in Figure 1. OpenPiton is designed to provide scalable meshes of tiles on a single chip, with the P-Mesh cache coherence system providing the ability to connect together up to 8192 chips in a single shared-memory system. A single OpenPiton tile (as shown in Figure 2(a)) consists of a modified OpenSPARC T1 core [8], its CPU-Cache 1Now at Esperanto Technologies. 2Now at NVIDIA. 2Now at Harvard Medical School. 5Now at Baidu SVAIL. 4Now at University of Washington. 6Now at Microsoft. 7 Now at University of California, Berkeley. (a) (b) P-Mesh Off-Chip