DesignCon 2011 Analysis of Noise to Jitter Transfer in Transceiver PDN and Channels

Jitter behavior has become increasingly critical design considerations for 12Gbps and 28Gbps transceiver devices featuring stringent specification compliance. In this paper, we present a comprehensive study of noise to jitter transfer mechanism, in which two dominant yet distinct jitter causes, power supply noise and signal crosstalk are investigated by phase noise method. The analysis reveals that buffer delay modulation and impulse sensitivity function are root transfer mechanism respectively with each manifesting itself uniquely in statistical nature of jitter calculation. Furthermore, design mitigation is proposed for transfer impedance optimization. At the end, hardware measurements are shown to well validate jitter reduction designs implemented in experimental device.